Intel(R) Dynamic Platform and Thermal Framework Sysfs Interface¶
© 2022 Intel Corporation
Srinivas Pandruvada <email@example.com>
Intel(R) Dynamic Platform and Thermal Framework (DPTF) is a platform level hardware/software solution for power and thermal management.
As a container for multiple power/thermal technologies, DPTF provides a coordinated approach for different policies to effect the hardware state of a system.
Since it is a platform level framework, this has several components. Some parts of the technology is implemented in the firmware and uses ACPI and PCI devices to expose various features for monitoring and control. Linux has a set of kernel drivers exposing hardware interface to user space. This allows user space thermal solutions like "Linux Thermal Daemon" to read platform specific thermal and power tables to deliver adequate performance while keeping the system under thermal limits.
DPTF ACPI Drivers interface¶
/sys/bus/platform/devices/<N>/uuids, where <N>
A set of UUIDs strings presenting available policies which should be notified to the firmware when the user space can support those policies.
"42A441D6-AE6A-462b-A84B-4A8CE79027D3" : Passive 1
"3A95C389-E4B8-4629-A526-C52C88626BAE" : Active
"97C68AE7-15FA-499c-B8C9-5DA81D606E0A" : Critical
"63BE270F-1C11-48FD-A6F7-3AF253FF3E2D" : Adaptive performance
"5349962F-71E6-431D-9AE8-0A635B710AEE" : Emergency call
"9E04115A-AE87-4D1C-9500-0F3E340BFE75" : Passive 2
"F5A35014-C209-46A4-993A-EB56DE7530A1" : Power Boss
"6ED722A7-9240-48A5-B479-31EEF723D7CF" : Virtual Sensor
"16CAF1B7-DD38-40ED-B1C1-1B8A1913D531" : Cooling mode
"BE84BABF-C4D4-403D-B495-3128FD44dAC1" : HDC
User space can write strings from available UUIDs, one at a time.
/sys/bus/platform/devices/<N>/, where <N>
User space daemon write 1 to respond to firmware event for sending keep alive notification. User space receives THERMAL_EVENT_KEEP_ALIVE kobject uevent notification when firmware calls for user space to respond with imok ACPI method.
Firmware thermal status variable values. Thermal tables calls for different processing based on these variable values.
Binary thermal table. Refer to https:/github.com/intel/thermal_daemon for decoding thermal table.
When different from zero, manufacturer locked thermal configuration from further changes.
ACPI Thermal Relationship table interface¶
This device provides IOCTL interface to read standard ACPI thermal relationship tables via ACPI methods _TRT and _ART. These IOCTLs are defined in drivers/thermal/intel/int340x_thermal/acpi_thermal_rel.h
ACPI_THERMAL_GET_TRT_LEN: Get length of TRT table
ACPI_THERMAL_GET_ART_LEN: Get length of ART table
ACPI_THERMAL_GET_TRT_COUNT: Number of records in TRT table
ACPI_THERMAL_GET_ART_COUNT: Number of records in ART table
ACPI_THERMAL_GET_TRT: Read binary TRT table, length to read is provided via argument to ioctl().
ACPI_THERMAL_GET_ART: Read binary ART table, length to read is provided via argument to ioctl().
DPTF ACPI Sensor drivers¶
DPTF Sensor drivers are presented as standard thermal sysfs thermal_zone.
DPTF ACPI Cooling drivers¶
DPTF cooling drivers are presented as standard thermal sysfs cooling_device.
DPTF Processor thermal PCI Driver interface¶
Refer to Power Capping Framework for powercap ABI.
Maximum powercap sysfs constraint_0_power_limit_uw for Intel RAPL
Power limit increment/decrements for Intel RAPL constraint 0 power limit
Minimum powercap sysfs constraint_0_power_limit_uw for Intel RAPL
Minimum powercap sysfs constraint_0_time_window_us for Intel RAPL
Maximum powercap sysfs constraint_0_time_window_us for Intel RAPL
Maximum powercap sysfs constraint_1_power_limit_uw for Intel RAPL
Power limit increment/decrements for Intel RAPL constraint 1 power limit
Minimum powercap sysfs constraint_1_power_limit_uw for Intel RAPL
Minimum powercap sysfs constraint_1_time_window_us for Intel RAPL
Maximum powercap sysfs constraint_1_time_window_us for Intel RAPL
TCC offset from the critical temperature where hardware will throttle CPU.
Available workload types. User space can specify one of the workload type it is currently executing via workload_type. For example: idle, bursty, sustained etc.
User space can specify any one of the available workload type using this interface.
DPTF Processor thermal RFIM interface¶
RFIM interface allows adjustment of FIVR (Fully Integrated Voltage Regulator), DDR (Double Data Rate) and DLVR (Digital Linear Voltage Regulator) frequencies to avoid RF interference with WiFi and 5G.
Switching voltage regulators (VR) generate radiated EMI or RFI at the fundamental frequency and its harmonics. Some harmonics may interfere with very sensitive wireless receivers such as Wi-Fi and cellular that are integrated into host systems like notebook PCs. One of mitigation methods is requesting SOC integrated VR (IVR) switching frequency to a small % and shift away the switching noise harmonic interference from radio channels. OEM or ODMs can use the driver to control SOC IVR operation within the range where it does not impact IVR performance.
Some products use DLVR instead of FIVR as switching voltage regulator. In this case attributes of DLVR must be adjusted instead of FIVR.
While shifting the frequencies additional clock noise can be introduced, which is compensated by adjusting Spread spectrum percent. This helps to reduce the clock noise to meet regulatory compliance. This spreading % increases bandwidth of signal transmission and hence reduces the effects of interference, noise and signal fading.
DRAM devices of DDR IO interface and their power plane can generate EMI at the data rates. Similar to IVR control mechanism, Intel offers a mechanism by which DDR data rates can be changed if several conditions are met: there is strong RFI interference because of DDR; CPU power management has no other restriction in changing DDR data rates; PC ODMs enable this feature (real time DDR RFI Mitigation referred to as DDR-RFIM) for Wi-Fi from BIOS.
The VCO reference code is an 11-bit field and controls the FIVR switching frequency. This is the 3-bit LSB field.
The VCO reference code is an 11-bit field and controls the FIVR switching frequency. This is the 8-bit MSB field.
Set the FIVR spread spectrum clocking percentage
Enable/disable of the FIVR spread spectrum clocking feature
This field is a read only status register which reflects the current FIVR switching frequency
This field indicated the revision of the FIVR HW.
Request the restriction of specific DDR data rate and set this value 1. Self reset to 0 after operation.
0 :Request is accepted, 1:Feature disabled, 2: the request restricts more points than it is allowed
Restricted DDR data rate for RFI protection: Lower Limit
Restricted DDR data rate for RFI protection: Upper Limit
DDR data rate selection 1st point
DDR data rate selection 2nd point
DDR data rate selection 3rd point
DDR data rate selection 4th point
Disable DDR rate change feature
DLVR hardware revision.
Current DLVR PLL frequency in MHz.
Sets DLVR PLL clock frequency. Once set, and enabled via dlvr_rfim_enable, the dlvr_freq_mhz will show the current DLVR PLL frequency.
PLL can't accept frequency change when set.
0: Disable RF frequency hopping, 1: Enable RF frequency hopping.
Sets DLVR spread spectrum percent value.
Specifies how frequencies are spread using spread spectrum. 0: Down spread, 1: Spread in the Center.
1: future writes are ignored.
DPTF Power supply and Battery Interface¶
Refer to Documentation/ABI/testing/sysfs-platform-dptf
DPTF Fan Control¶
Refer to ACPI Fan Performance States