x86-specific Documentation

• 1. The Linux/x86 Boot Protocol
  • 1.1. Memory Layout
  • 1.2. The Real-Mode Kernel Header
  • 1.3. Details of Header Fields
  • 1.4. The kernel_info
  • 1.5. Details of the kernel_info Fields
  • 1.6. The Kernel Command Line
  • 1.7. Memory Layout of The Real-Mode Code
  • 1.8. Sample Boot Configuration
  • 1.9. Loading The Rest of The Kernel
  • 1.10. Special Command Line Options
  • 1.11. Running the Kernel
  • 1.12. Advanced Boot Loader Hooks
  • 1.13. 32-bit Boot Protocol
  • 1.14. 64-bit Boot Protocol
  • 1.15. EFI Handover Protocol (deprecated)
• 2. DeviceTree Booting
• 3. x86 Feature Flags
  • 3.1. Introduction
  • 3.2. How are feature flags created?
  • 3.3. Naming of Flags
  • 3.4. Flags are missing when one or more of these happen
• 4. x86 Topology
  • 4.1. Package
  • 4.2. Cores
  • 4.3. Threads
  • 4.4. System topology examples
• 5. Kernel level exception handling
• 6. Kernel Stacks
  • 6.1. Kernel stacks on x86-64 bit
  • 6.2. Printing backtraces on x86
• 7. Kernel Entries
• 8. Early Printk
  • 8.1. Hardware requirements
  • 8.2. Software requirements
  • 8.3. Testing
• 9. ORC unwinder
  • 9.1. Overview
  • 9.2. ORC vs frame pointers
  • 9.3. ORC vs DWARF
  • 9.4. ORC unwind table generation
  • 9.5. Unwinder implementation details
  • 9.6. Etymology
• 10. Zero Page
• 11. The TLB
• 12. MTRR (Memory Type Range Register) control
  • 12.1. Phasing out MTRR use
  • 12.2. Reading MTRRs from the shell
  • 12.3. Creating overlapping MTRRs
  • 12.4. Removing MTRRs from the C-shel
  • 12.5. Reading MTRRs from a C program using ioctl()’s
  • 12.6. Creating MTRRs from a C programme using ioctl()’s
• 13. PAT (Page Attribute Table)
  • 13.1. PAT APIs
  • 13.2. Advanced APIs for drivers
  • 13.3. MTRR effects on PAT / non-PAT systems
  • 13.4. PAT debugging
  • 13.5. PAT Initialization
• 14. Hardware-Feedback Interface for scheduling on Intel Hardware
  • 14.1. Overview
  • 14.2. The Hardware Feedback Interface
  • 14.3. Implementation details for Linux
  • 14.4. References
• 15. Control-flow Enforcement Technology (CET) Shadow Stack
  • 15.1. CET Background
  • 15.2. Requirements to use Shadow Stack
  • 15.3. Application Enabling
  • 15.4. Enabling arch_prctl()’s
  • 15.5. Proc Status
  • 15.6. Implementation of the Shadow Stack
• 16. x86 IOMMU Support
  • 16.1. Basic stuff
  • 16.2. How is an I/O Virtual Address (IOVA) generated?
  • 16.3. Intel Specific Notes
  • 16.4. AMD Specific Notes
  • 16.5. Fault reporting
  • 16.6. Kernel Log Samples
• 17. Intel(R) TXT Overview
  • 17.1. Trusted Boot Project Overview
  • 17.2. Value Proposition for Linux or “Why should you care?”
  • 17.3. How Does it Work?
  • 17.4. Configuring the System
• 18. Debugging AMD Zen systems
  • 18.1. Introduction
  • 18.2. S3 vs s2idle
  • 18.3. s2idle debugging tool
  • 18.4. Spurious s2idle wakeups from an IRQ
  • 18.5. Spurious s2idle wakeups from a GPIO
  • 18.6. s2idle PM debug messages
  • 18.7. Historical examples of s2idle issues
  • 18.8. Runtime power consumption issues
  • 18.9. BIOS debug messages
  • 18.10. Random reboot issues
• 19. AMD Memory Encryption
  • 19.1. Secure Nested Paging (SNP)
  • 19.2. Reverse Map Table (RMP)
  • 19.3. Secure VM Service Module (SVSM)
• 20. AMD HSMP interface
  • 20.1. HSMP device
  • 20.2. HSMP sysfs interface
  • 20.3. ACPI device object format
  • 20.4. HSMP HWMON interface
  • 20.5. An example
• 21. Intel Trust Domain Extensions (TDX)
  • 21.1. TDX Host Kernel Support
  • 21.2. TDX Guest Support
  • 21.3. Attestation
  • 21.4. References
• 22. Page Table Isolation (PTI)
  • 22.1. Overview
  • 22.2. Page Table Management
  • 22.3. Overhead
  • 22.4. Possible Future Work
  • 22.5. Testing
  • 22.6. Debugging
• 23. Microarchitectural Data Sampling (MDS) mitigation
  • 23.1. Overview
  • 23.2. Exposure assumptions
  • 23.3. Mitigation strategy
  • 23.4. Kernel internal mitigation modes
  • 23.5. Mitigation points
• 24. The Linux Microcode Loader
  • 24.1. Early load microcode
  • 24.2. Late loading
  • 24.3. Why is late loading dangerous?
  • 24.4. Builtin microcode
• 25. TSX Async Abort (TAA) mitigation
  • 25.1. Overview
  • 25.2. Mitigation strategy
  • 25.3. Kernel internal mitigation modes
• 26. Bus lock detection and handling
  • 26.1. Problem
  • 26.2. Detection
  • 26.3. Software handling
  • 26.4. Usages
  • 26.5. Guidance
• 27. USB Legacy support
• 28. i386 Support
  • 28.1. IO-APIC
• 29. x86_64 Support
  • 29.1. General note on [U]EFI x86_64 support
  • 29.2. Memory Management
  • 29.3. 5-level paging
  • 29.4. Fake NUMA For CPUSets
  • 29.5. Firmware support for CPU hotplug under Linux/x86-64
  • 29.6. Configurable sysfs parameters for the x86-64 machine check code
  • 29.7. Using FS and GS segments in user space applications
  • 29.8. Flexible Return and Event Delivery (FRED)
• 30. In-Field Scan
  • 30.1. Introduction
  • 30.2. IFS Image
  • 30.3. IFS Image Loading
  • 30.4. Running tests
  • 30.5. Driver design choices
  • 30.6. Structural Based Functional Test at Field (SBAF):
• 31. Shared Virtual Addressing (SVA) with ENQCMD
  • 31.1. Background
  • 31.2. Shared Hardware Workqueues
  • 31.3. ENQCMD
  • 31.4. Process Address Space Tagging
  • 31.5. PASID Management
  • 31.6. PASID Life Cycle Management
  • 31.7. Relationships
  • 31.8. FAQ
  • 31.9. References
• 32. Software Guard eXtensions (SGX)
  • 32.1. Overview
  • 32.2. Enclave Page Cache
  • 32.3. Application interface
  • 32.4. ksgxd
  • 32.5. Launch Control
  • 32.6. Encryption engines
  • 32.7. Usage Models
  • 32.8. Impact of Potential Kernel SGX Bugs
  • 32.9. Virtual EPC
• 33. Feature status on x86 architecture
• 34. x86-specific ELF Auxiliary Vectors
  • 34.1. Introduction
  • 34.2. The exposed auxiliary vectors
• 35. Using XSTATE features in user space applications
  • 35.1. The purpose for dynamic features
  • 35.2. Using dynamically enabled XSTATE features in user space applications
  • 35.3. Dynamic features in signal frames
  • 35.4. Dynamic features for virtual machines